The present disclosure relates generally to messaging between processing modules, and more particularly, the management of unaligned Direct Memory Access (DMA) transfers of data.
Direct Memory Access (DMA) allows data to move directly from the memory of one computer into that of another without involving either one's operating system. This permits high-throughput, low-latency networking, which is especially useful in massively parallel computer clusters.
In systems with small amounts of memory. Some heterogeneous memory architectures have restrictions on the address and size alignment of DMAs. These architectures may enforce restrictions that require both the source and destination addresses to have the same byte offset within a certain alignment window. In addition, the DMA size may also be restricted to alignment rules based on the address alignment.
These alignment restrictions can cause difficulty. Careful attention must be taken to insure program adherence to these alignment restrictions in both address and size.
Existing solutions for “re-aligning” the users data presents two main obstacles. Existing solutions use conventional memory copy techniques, which do not typically scale well as larger size transfers require large amounts of copying, which negatively impacts performance. To compound matters, in small memory systems, memory is at a premium, so allocating comparable sized storage for copying it not always possible or logical because it would require twice as much memory. For example, using a full size copy buffer to perform a 32 KB DMA would require 32 KB plus the alignment size. Given the copy buffer size the operation would actually require a little more than 64 KB to do a 32 KB DMA.
Another solution would be to use a single smaller sized buffer to re-use numerous times to do a larger DMA. The dependency on this single buffer would cause the DMA to become serialized making it far more inefficient.